This course is an introduction to digital design using Verilog RTL. The attendees will be introduced to digital design for both combinational and sequential logic. They will be taught how to code their digital designs in Verilog RTL, they will learn how to create simulation test benches, and finally will have hands-on labs to build their designs using Xilinx FPGAs.
ECE Engineers or anybody with basic ECE knowledge who are interested to learn digital design basics using FPGAs.
Digital design for combinational & sequential logic
Digital designs coding in Verilog
Build test benches using Verilog to test your design
Use Xilinx Vivado in digital design